ASIC Physical Design Intern

Synopsys Inc

Jan 10

Applications are closed

Internship
Full-time
Off-cycle Internship
Software Engineering
Engineering
Boxborough

Requirements

Knowledge of basic circuits and logic design.
Proficiency in a scripting language (e.g., Perl, Python, or Tcl).
Understanding of timing analysis and placement and route tools.
Familiarity with Verilog and low power design techniques is a plus.
Completed at least 2 semesters of university coursework in Electrical Engineering, Computer Engineering, Computer Science, Applied Physics, or a similar technical field.

Responsibilities

Learning the design flows that enable physical design activities of high-speed IPs such as DDR/UCIe/HBMs at cutting-edge technology nodes.
Analyzing and documenting the static timing environment of high-speed logic and/or custom circuits.
Coding to improve the static timing environment of high-speed logic and/or custom circuits.
Collaborating with the MSIP ASIC Physical Design Implementation team to integrate more capabilities into an SoC.
Gaining hands-on experience with placement and route tools, timing analysis, and low power design techniques.
Contributing to the development and verification of gate-level design and electrical reliability of physical design.
Enhancing the design flows for high-speed IPs, contributing to the efficiency and performance of our products.
Improving the static timing environment, ensuring the reliability and speed of our high-speed logic and custom circuits.
Supporting the MSIP ASIC Physical Design Implementation team in achieving their goals and delivering high-quality silicon IP.
Helping to integrate more capabilities into an SoC, meeting the unique performance, power, and size requirements of target applications.
Contributing to the timely market delivery of differentiated products with reduced risk.
Building a solid foundation of knowledge and skills in ASIC Physical Design, preparing yourself for a successful career in the industry.

FAQs

What is the duration of the internship?

This internship will last for a duration of 6 months for Undergraduate (Bachelor's) students and can be flexible for Master’s students.

Where is the internship located?

The internship is located in Boxborough, Massachusetts.

What is the working model for this internship?

The working model for this internship is onsite.

Is the internship full-time or part-time?

The internship is a full-time position.

When does the internship start?

The internship is set to start in May 2025.

What kind of projects will I be working on during the internship?

During the internship, you will be learning design flows for physical design activities, analyzing static timing environments, coding improvements for high-speed circuits, and collaborating with the MSIP ASIC Physical Design Implementation team, among other tasks.

What skills are needed for this internship?

Candidates should have knowledge of basic circuits and logic design, proficiency in a scripting language (such as Perl, Python, or Tcl), an understanding of timing analysis and placement and route tools, and familiarity with Verilog and low power design techniques is a plus.

What educational background do I need to qualify for this internship?

You should have completed at least 2 semesters of university coursework in Electrical Engineering, Computer Engineering, Computer Science, Applied Physics, or a similar technical field.

Will I receive compensation for this internship?

Yes, the internship comes with a base salary range between $32.00 - $46.00 per hour, and may also offer an annual bonus, equity, and other discretionary bonuses.

What can I expect from the internship program at Synopsys?

You can expect hands-on experience with real-world projects, collaboration with passionate teams, opportunities to share your ideas, and a chance to work with cutting-edge technology while preparing for a successful career in the industry.

Synopsys Inc

Powering the New Era of Smart Everything—from Silicon to Software

Technology

Industry

10,001+

Employees

Mission & Purpose

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every day.