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🚀 Internship

ASIC Verification Intern - Summer 2024

🚀 Summer Internship

San Francisco

🤑 $61.9K - $94.9K

AI generated summary

  • The candidate must be pursuing a degree in Electrical Engineering, Computer Engineering, Computer Science or related field, and have familiarity with digital design concepts and verification methodologies. Knowledge of SystemVerilog and UVM is a plus, along with strong problem-solving and analytical skills, excellent communication and interpersonal skills, and exposure to programming using C/C++/Python.
  • The ASIC Verification Intern at Juniper Networks will be responsible for participating in ASIC verification, developing verification environments, writing and running test cases, debugging hardware issues, and collaborating with design engineers to ensure quality deliverables.

Summer Internship

Software EngineeringSan Francisco

Description

  • Juniper Networks is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training and teamwork within a collaborative and innovative culture.

Requirements

  • Pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or related field.
  • Familiarity with digital design concepts and verification methodologies.
  • Knowledge of SystemVerilog and UVM is a plus.
  • Strong problem-solving and analytical skills.
  • Excellent communication and interpersonal skills.
  • Exposure to programming using C/C++/Python

Education requirements

Currently Studying
Bachelors
Masters

Area of Responsibilities

Software Engineering

Responsibilities

  • Participate in verification of ASIC components using simulation and/or emulation.
  • Develop and maintain verification environments using UVM/SystemVerilog.
  • Write and run test cases to validate designs against specifications.
  • Debug and resolve hardware issues found during verification.
  • Collaborate with design engineers to ensure the quality of deliverables.

Details

Work type

Full time

Work mode

office

Location

San Francisco

Salary

61875 - 94875 USD