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Internship

FPGA — Intern (Summer 2024)

🚀 Summer Internship

San Francisco

AI generated summary

  • You need a strong background in FPGA development and experience in designing high throughput systems. Proficiency in Verilog/SystemVerilog is a must, with bonus points for familiarity with Xilinx FPGAs, Vivado IDE, and advanced verification techniques. Experience in power, thermal, and real estate considerations, as well as digital communication theory and space-based systems, are highly valued.
  • You'll develop RTL for FPGA applications, work with multiple FPGAs and peripherals, write software for testing, and collaborate with engineers at Astranis.

Summer Internship

Software EngineeringSan Francisco

Description

  • Internships at Astranis typically last for twelve weeks, and are hourly roles designed for students who are currently enrolled at a four-year university. 
  • As an Intern, you will have an amazing opportunity to work on hard problems — we pride ourselves on giving everyone at Astranis a chance to do meaningful work on challenging projects, no matter their seniority. Many past interns have designed and tested hardware/software that is heading to space on our first satellite, and many of them are now full-time employees at Astranis. 
  • If you have already graduated from a four-year university, please apply to be an Associate Engineer.

Requirements

  • Currently pursuing a B.S. or M.S. in electrical engineering, computer science, computer engineering, or equivalent
  • A passion for hardware development, including working in a fast-paced environment and hands-on design and development
  • Experience in designing, implementing, and testing high throughput systems implemented on FPGAs
  • Proficiency with Verilog/SystemVerilog for synthesis
  • Don't meet them all? Not a problem. Please apply even if you do not meet all these criteria.
  • Bonus:
  • Experience with UVM and advanced SystemVerilog verification
  • Experience with Xilinx FPGAs
  • Experience with Vivado IDE, TCL
  • Familiarity with system level estimates and implications of power, thermal, and real estate
  • Experience with high speed data converters (ADCs, DACs, JESD204B)
  • Experience with circuit level debugging
  • Experience with digital communication theory and implementation, such as LDPC implementations
  • Experience with space-based systems
  • Experience with modern communication systems (RF, IF/IQ, time/freq domains, modulation)
  • Experience in at least 1 domain beyond logic design. This could be DSP/radio design, software, hi-rel design (e.g. fault analysis & recover), etc.

Education requirements

Currently Studying

Area of Responsibilities

Software Engineering

Responsibilities

  • RTL Development for FPGA targeted applications
  • Work with multiple FPGAs and toolchains
  • Interface FPGAs with a variety of peripherals including high speed data converters, memories, MCUs
  • Write software to interface and test RTL in hardware
  • Collaborate closely with electrical and software engineers

Details

Work type

Full time

Work mode

hybrid

Location

San Francisco