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Internship

Intern, APL Research Scientist

🚀 Off-cycle Internship

San Jose

AI generated summary

  • Currently pursuing degree in CS, CE, or EE, with over 2 years of industry experience in Digital IP development or Processor/Accelerator design. Inclusive, adaptive, avid learner, collaborative, innovative, and creative.
  • The intern will work on defining microarchitecture of high-performance processors, designing simulators, contributing to architecture ideas, collaborating with cross-functional teams, investigating PPA improvements, and verifying RTL code at Samsung Semiconductor.

Off-cycle Internship

Software Engineering, EngineeringSan Jose

Description

The Advanced Processor Lab is committed to shaping the future of CPU processor and SoC architecture for the most demanding applications of the future, like AI and HPC. We believe the CPU should be the center of technology to run all of heterogenous computing engines with complex software under an easy-to-use programming environment. Join us to innovate ways we can tightly couple hardware engines while maximizing the efficiency and performance of CPU processor

  • Project: Based on RISC-V compatible processor, accelerator and SOC technology, our target is to design high-performance and flexible tightly-coupled CPU architecture. Major target systems are data-center, supercomputer, and autonomous vehicles.
  • Skills You’ll Learn
  • Understanding of CPU architecture and tightly-coupled accelerator
  • Understanding of SoC development
  • Understanding of how to improve PPA efficiency in micro-architecture
  • Understanding of how to analyze and accelerate AI and HPC applications
  • Understanding of customization in processor related to applications
  • Language skills – C/C++, SystemC, Python, Verilog, etc.

Requirements

  • Currently pursuing Bachelor’s, Master’s, or Ph.D. in Computer Science, Computer Engineering, or Electrical Engineering, with more than 2 years of relevant industry experience
  • Knowledge of Digital IP development or Processor/Accelerator design
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Education requirements

Currently Studying
Bachelors
Masters
PhD

Area of Responsibilities

Software Engineering
Engineering

Responsibilities

  • Define the microarchitecture of inside high-performance processor, compatible RISC-V ISA.
  • Design the tightly-coupled manner with computing extensions.
  • Design several simulators (C or Python) with different levels.
  • Will also have the chance to contribute to the architecture ideas and methodology with own suggestions, while doing analysis or experiments.
  • Involve the SoC development and related IP development
  • Investigate PPA improvements.
  • Design or verify RTL code.Investigate other works in papers for specific items
  • Collaborate with cross-functional teams and experts, including applications/software engineers, performance team, backend designers, and other architecture teams.
  • Complete other responsibilities as assigned.

Details

Work type

Full time

Work mode

hybrid

Location

San Jose