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Intern, Architecture Research Engineer

  • Internship
    Full-time
    Off-cycle Internship
  • Engineering
    IT & Cybersecurity
  • San Jose
  • Quick Apply

AI generated summary

  • You should be pursuing an advanced degree in CS or EE, with research in hardware architectures, simulator development, and ML workloads. Familiarity with PyTorch/TensorFlow is essential.
  • You will research novel ML architectures, optimize algorithms for energy efficiency, collaborate with teams, integrate techniques into compilers, write papers, and stay updated on industry trends.

Requirements

  • Pursuing Masters, or PhD in Computer Science or Electrical Engineering preferred.
  • Research experience with hardware architectures such as CPUs, GPUs, TPUs, and NPUs.
  • Published papers in Microarchitecture conferences preferred.
  • Experiences in developing simulators for high-performance computing systems.
  • Understanding of system level characteristics of LLM, DLRM and CNN and other ML workloads.
  • Familiarity with PyTorch, Tensorflow, or JAX.
  • Strong analytical and problem-solving skills.
  • Excellent communication and interpersonal skills.
  • Ability to work independently and as part of a team.
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You're collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Responsibilities

  • Research novel architectures for high-performance deep learning applications.
  • Research design space exploration methodology and pruning for efficient architecture exploration.
  • Design algorithms and microarchitectural features to optimize data locality to minimize energy consumption.
  • Work closely with the compiler team to integrate new ML techniques and algorithms into the compiler.
  • Collaborate with cross-functional teams to define and deliver discover and implement microarchitecture features and improvements.
  • Contribute to ML architecture research and write research papers.
  • Stay up-to-date with the latest trends and advancements in the field of ML architectures.
  • Complete other responsibilities as assigned.

FAQs

What is the location of the internship?

The internship is hybrid, requiring onsite work at our San Jose, CA headquarters 3 days per week, with the flexibility to work remotely the remaining time.

What educational background is preferred for this internship?

We prefer candidates pursuing a Master’s or PhD in Computer Science or Electrical Engineering.

Is research experience necessary for this position?

Yes, research experience with hardware architectures such as CPUs, GPUs, TPUs, and NPUs is necessary.

Are published papers in microarchitecture conferences a requirement?

While it's preferred, published papers in microarchitecture conferences are not a strict requirement.

What programming frameworks should applicants be familiar with?

Familiarity with PyTorch, TensorFlow, or JAX is required.

What skills are needed for this position?

Strong analytical and problem-solving skills, excellent communication and interpersonal skills, and the ability to work independently and as part of a team are needed.

Are there any specific responsibilities for this role?

Yes, responsibilities include researching novel architectures, exploring design space methodologies, optimizing data locality, collaborating with cross-functional teams, and contributing to ML architecture research.

What kind of work environment does the company promote?

The company promotes an inclusive culture that values diversity and encourages individuals to be their true selves.

Is there any special consideration for candidates with disabilities?

Yes, comprehensive accommodations throughout the recruiting processes are provided for candidates with disabilities and those requiring additional support.

What is the application limit for candidates?

Each candidate is limited to 10 applications across all open jobs within a 6-month period.

Are there any COVID-19 safety guidelines for employees?

Yes, employees are encouraged to get vaccinated, may be required to complete health questionnaires, and must conduct weekly COVID tests, with policies subject to change based on public health guidelines.

Manufacturing & Electronics
Industry
10,001+
Employees

Mission & Purpose

Established in 1974 as a subsidiary of Samsung Electronics, we’re proud to be recognized as one of the leading chip manufacturers in the world. Using our knowledge in semiconductor technology, our ambition is to spark the imagination of device manufacturers with top-of-the-line building blocks and, through that, enrich the lives of people around the world with transformative solutions.