FAQs
What is the duration of the internship?
The internship will last from June 2025 to August 2025.
Where is the internship located?
The internship is located in San Jose, CA.
What is the work model for this internship?
The work model for this internship is onsite.
What type of projects will the intern be working on?
The intern will be working on CXL (Compute Express Link) memory solutions and advanced CXL memory architectures.
What qualifications are required for this internship?
A Master's degree in Electrical Engineering, Computer Engineering, or a related field is required, along with a strong understanding of CXL protocols and memory subsystems.
Is experience in digital circuit design necessary for this role?
Yes, experience in digital circuit design, computer architecture, or VLSI design is important for this role.
What programming languages and tools should candidates be proficient in?
Candidates should be proficient in hardware description languages (Verilog/VHDL), C/C++, Python, and performance modeling tools.
Will interns receive any housing allowance?
Yes, eligible interns will receive a housing allowance during their internship.
What is the pay range for this internship position?
The U.S. pay range for this position is $25.00 - $47.00 per hour.
Is SK hynix America an equal opportunity employer?
Yes, SK hynix America is an Equal Employment Opportunity Employer and provides equal employment opportunities to all qualified applicants without regard to various protected statuses.