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Principal Engineer, Digital Design Engineering

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Analog Devices

Aug 1

  • Job
    Full-time
    Senior & Expert Level
  • Wilmington, +1
  • Quick Apply

AI generated summary

  • You should have expertise in digital design engineering, strong problem-solving skills, and experience with design tools and methodologies. A relevant degree and leadership experience are preferred.
  • You will design and develop digital circuits, collaborate with cross-functional teams, optimize performance, troubleshoot issues, and mentor junior engineers to deliver high-quality solutions.

Requirements

  • Minimum B.E. /B.Tech degree in Electrical/Electronics/Computer science
  • 5 -12+ years of digital logic design and hands-on RTL coding experience using Verilog and SystemVerilog
  • Strong understanding of control path and data-path digital design concepts with an eye for realizing correct by construction solutions
  • Experience with specifying Design Verification (DV) requirements such as test plans, coverage metrics, and evaluate DV quality so as to realize robust design quality
  • Knowledge of Lint, CDC, formal equivalence, DFT concepts, power analysis
  • Experience with developing timing constraints and ability to carry out logic synthesis and Static timing analysis
  • Ability to technically mentor a few junior engineers
  • Good interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographically
  • Understanding of standard on-chip interfaces such as APB/AHB/AXI/ Stream protocols is a strong plus
  • Knowledge of Processor/SoC architecture and/or DSP fundamentals is a strong plus
  • Experience with end-to-end ASIC/ SoC product development & productization is very desirable

Responsibilities

  • Architect and Design key digital blocks such as accelerators/ datapath IP in Verilog/ System Verilog with built-in configurability to allow Power/ Performance/ Area tradeoffs
  • Develop strong understanding of heterogenous processor cores & subsystems (A55/ M55/ M4/ U55/ RISC-V/ DSP core, and associated infrastructure such as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements
  • Consolidate & curate digital IP for SPI/ I2C/ UART/ JTAG and other slow serial interfaces & peripherals
  • Evaluate 3rd party IPs on Power/ Performance/ Area (PPA) and other key qualitative aspects such as design quality, Design For Testability, robustness of Design Verification (DV) practice, ease of integration and make recommendations
  • Build deep expertise on complex interfaces, peripherals & protocols such as DDR, Ethernet, eMMC/ SD, MIPI, Display Port, HDMI, PCIe, high speed D2D
  • Package Digital IP for seamless integration into design flow at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence etc
  • Develop and maintain catalog of digital IPs to enable ease of information sharing to customers across different BUs
  • Develop User Guides for RTL Integration, Synthesis, DFT, PnR, Programming Sequence, characterization etc
  • Establish evaluation flows for home-grown & 3rd party IPs for consistent benchmarking of evaluation

FAQs

What is the role of a Principal Engineer in Digital Design Engineering at Analog Devices, Inc.?

The Principal Engineer will provide technical leadership to the digital design team, manage IP development and delivery, and engage with internal customers to improve and maintain developed IP.

What qualifications are required for this position?

Candidates should have a minimum B.E. / B.Tech degree in Electrical/Electronics/Computer Science and 5-12+ years of digital logic design experience with hands-on RTL coding using Verilog and SystemVerilog.

Is experience with third-party IP evaluation necessary for this job?

Yes, experience evaluating third-party IPs on Power/Performance/Area (PPA) as well as qualitative aspects like Design Verification practices is important for this role.

What will I be expected to do regarding digital IPs?

You will be responsible for architecting and designing key digital blocks, consolidating and curating digital IPs, maintaining a catalog of digital IPs, and packaging digital IP for seamless integration into design flow.

Will I have the opportunity to mentor junior engineers?

Yes, the position includes a requirement to technically mentor a few junior engineers.

What types of interfaces will I need to understand for this role?

You'll need a deep expertise in complex interfaces and protocols such as DDR, Ethernet, eMMC/SD, MIPI, Display Port, HDMI, and PCIe.

Will I have to travel for this job?

Yes, the required travel is about 10% of the time.

How does Analog Devices, Inc. support its employees?

ADI fosters a culture focused on employees with beneficial programs, continuous learning opportunities, and practices aimed at creating a sustainable future.

What is the evaluation process for the position?

Applicants may have to go through an export licensing review process for certain requirements, depending on their citizenship status.

Are there any preferred qualifications for this role?

Knowledge of Processor/SoC architecture, DSP fundamentals, and experience with end-to-end ASIC/SoC product development are considered a strong plus.

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Analog Devices

Global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge

Manufacturing & Electronics
Industry
10,001+
Employees
1965
Founded Year

Mission & Purpose

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible.