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2024 ASIC Physical Design Engineer Intern, Annapurna Labs



Feb 9

  • Internship
    Summer Internship
  • Engineering
  • $104K - $212.2K
  • Austin

AI generated summary

  • The candidate must be currently enrolled in a Bachelor's or Master's degree program in Electrical Engineering, Computer Engineering, or a related field. They should have a strong understanding of VLSI circuit design and have completed relevant coursework and lab projects. Additionally, experience with scripting languages such as Python or Perl, as well as knowledge of FinFET design, EDA tools, and Verilog/SystemVerilog, is preferred.
  • The candidate will be responsible for performing physical design, including chip floorplanning, analysis, optimization, script writing, and collaboration with designers, for Amazon's machine learning custom silicon solutions.


  • Basic Qualifications:
  • Enrolled in a Bachelors’ degree program or higher in Electrical Engineering, Computer Engineering, or a related field with a graduation conferral date between December 2024 and September 2025
  • Scripting internship/project experience with Python, Perl or equivalent
  • Strong understanding of VLSI circuit design fundamentals
  • Have taken at least one or more VLSI circuit design and implementation classes and done lab projects
  • Preferred Qualification:
  • Enrolled in a Master’s degree program in Electrical Engineering or Computer Engineering
  • Previous relevant technical internship experience
  • Experience with FinFET design, Clock/Power Distribution, Spice Circuit analysis
  • Experience with Place and Route, digital implementation
  • Experience with EDA tools from Synopsys (ICC2, DC, PT), Cadence (Genus, Innovus, Voltus)
  • Experience with Verilog/SystemVerilog


  • Perform physical design for Amazon's machine learning custom silicon solutions
  • Participate in various aspects of physical design: full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity analysis, and physical verification
  • Write Tcl or PERL scripts to improve physical design flows and methods
  • Collaborate with RTL, DFT designers to ensure high quality design implementation

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