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Job

ASIC Engineer, Design (University Grad)

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Meta

1mo ago

💼 Graduate Job

Austin +1

⌛ Closed
Applications are closed

Graduate Job

EngineeringAustin, Sunnyvale

Description

  • Meta is seeking an ASIC Engineer, Design to join our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, video transcoding and network acceleration. This organization is responsible for building and maintaining the data centers that host all of our services - Facebook, Instagram, WhatsApp etc.
  • These servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. In this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with experts in the domain of video transcode, AI/ML and other technologies to evaluate algorithms, develop functional and performance models and help architect state-of-the art hardware accelerator ASICs. Come work and learn alongside our expert engineers to build “Green” data center accelerators.

Requirements

  • Minimum Qualifications:
  • Exposure to Micro-architecture development.
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
  • Exposure to RTL development using Verilog, System Verilog or HLS.
  • Knowledge of Computer Architecture and Logic Design fundamentals.
  • Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.
  • Preferred Qualifications:
  • Currently has, or is in the process of obtaining, a Masters degree in Electrical Engineering, Computer Engineering or related engineering fields.
  • Experience in data path development.
  • Experience in HLS.
  • Experience with Lint, CDC, Synthesis, & Power Optimization.
  • Experience with High Performance Computing.
  • Scripting capability with Python or Perl.

Education requirements

Currently Studying

Area of Responsibilities

Engineering

Responsibilities

  • Participate in Micro-architecture, Design, and Verification reviews and provide feedback.
  • Design and develop RTL or HLS code for some of the IPs.
  • Analyze designs and enhance PPA (Power, Performance, Area).
  • Support and develop Verification Infrastructure, analyze and improve Verification Coverage.
  • Support Simulation accelerators and post-Silicon validation.

Details

Work type

Full time

Work mode

office

Location

Austin, Sunnyvale