Logo of Huzzle

Job

EDA Tools Software Engineer

Logo of Intel Corporation

Intel Corporation

•

19d ago

đź’Ľ Graduate Job

Hillsboro

AI generated summary

  • You must possess MS/PhD in Electrical/Computer Engineering/Computer Science. Experience in Python, C++, E-beam, semiconductor/MEMS design, clean room microfabrication, and EDA tools like Cadence Virtuoso/Synopsys ICV/Siemens Calibre is required.
  • You will collaborate with process technologists, design test structures, automate physical design, and explore new inspection techniques at Intel Corporation as an EDA Tools Software Engineer.

Graduate Job

Software Engineering•Hillsboro

Description

  • As an EDA Tools Software Engineer in the Test Chip Engineering group with a focus on inline test structure design, you will be responsible for design of E-beam inline yield and defect metrology test structures and development of physical design automation tools, flows, methodologies, and processes to support Intel's next generation process technology.


Requirements

  • You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.
  • Minimum Qualifications:
  • Candidate must possess MS degree with 6+ months of experience or PhD degree with 1+ years of experience in in Electrical Engineering, Computer Engineering, Computer Science, or other engineering fields.
  • Must have the required degree or expect the required degree by the date of start.
  • Experience in the following:
  • Solid programming and scripting languages such as Python, or C++.
  • Preferred Qualifications:
  • Experience in the following:
  • Design and test of E-beam inline test structures.
  • Design and fabrication of semiconductor or MEMS devices.
  • Clean room microfabrication experiences on lithography, deposition, and etching tools.
  • Development of parameterized cells (PCells using Cadence SKILL) or PyCell.
  • Industry-standard EDA tools such as Cadence Virtuoso, Synopsys ICV, Siemens Calibre for use in physical design, place and route scripts, and DRC verification.

Education requirements

Masters
PhD

Area of Responsibilities

Software Engineering

Responsibilities

  • Collaborating with semiconductor process technologists to define design specification.
  • Design of Experiments (DOE) and physical design for test structures to monitor process yield, defect and margin conditions.
  • Development of EDA software tools and flows that automate physical design at scale.
  • Explore new opportunities to leverage inline inspection techniques to accelerate process technology development

Details

Work type

Full time

Work mode

hybrid

Location

Hillsboro